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                Learn to Place: FPGA Placement Using Reinforcement Learning and Directed Moves

                Submitted by neurta on Tue, 06/29/2021 - 10:49
                Simulated Annealing (SA) is widely used in FPGA placement either as a standalone algorithm or a refinement step after initial analytical placement. SA-based placers have been shown to achieve high-quality results at the cost of long runtimes. In this paper, we propose an improvement of SA-based placement using directed moves and Reinforcement Learning (RL). The proposed directed moves explore the solution space more efficiently than traditional random moves, and target both wirelength and timing optimizations. The RL agent further improves efficiency by dynamically selecting the most effective move types as optimization progresses. Taken together, these enhancements allow more efficient exploration of the large solution space than traditional annealing. Experimental results on the VTR benchmark suite show that our technique outperforms the widely-used VTR 8 placer across a wide range of CPU-quality trade-off points, achieving 5-11% reduced wirelength and comparable or shorter critical path delays in a given runtime, or 33-50% shorter runtimes for a target quality point.

                強化學習(Reinforcement Learning)介紹

                Submitted by huzhenda on Sat, 07/14/2018 - 15:21

                當前的機器學來著習算法可以分為3種:有監督的學習(Supervised Learning)、無監督的學△習(Unsupervised Learning)和強化學習(Reinforcement Learning),結構圖如下所示:?


                其他許〗多機器學習算法中學習器都是學得怎樣二十年做,而RL是在嘗試的∴過程中學習到在特定的情境下選擇哪根本就不會去做那種虛抬價格種行動可以得到最大的回報。在很多場景中,當前的行動不僅會一刀一劍影響當前的rewards,還會影№響之後的狀態和一系列的rewards。RL最重要的3個特定在而其他於:(1)基本是以一種閉環★的形式;(2)不會直接指示選擇▂哪種行動(actions);(3)一系列的actions和獎勵信號(reward signals)都會影響之後較長的時♀間。?